Dual PipeTrace Viewer
Project
The Dual PipeTrace Viewer (dptv) is a processor pipeline event visualization tool. A processor simulator will record pipeline events, and generate a trace file. The dptv viewer tool is written in C, using the SDL2 graphical package. dptv will display the pipeline events in a pipeline timing diagram, such that the user can easily zoom and pan to navigate the dynamic instruction steam. Similar tools have been developed and published in prior literature. The key feature, not found in any other tools, is the ability to display two traces such that the same benchmark has been simulated on different processor configurations, even if the two configurations operate at different clock frequencies. dptv therefore makes it much easier to compare performance trade-offs when exploring architectural alternatives.
Team
Adam Grunwald, bachelor student of computer science with embedded systems emphasis
Phuong Nguyen, masters graduate of computer science and softare engineering
Elliott Forbes, professor of computer science
Publications
Grunwald, A., Nguyen, P. and Forbes, E., "dptv: A New PipeTrace Viewer for Microarchitectural Analysis," Proceedings of the 55th Midwest Instruction and Computing Symposium, March 2023. [pdf coming soon]
Presentations
Midwest Instruction and Computing Symposium, 2023. [pdf coming soon]
Status
dptv development is still currently in progress. The viewer is easily able to visualize large traces, on the order of hundreds of thousands, up to millions of dynamic instructions. The code base is mature and stable, however work must still be done to integrate into a wider variety of processor simulators.
Source code will be available soon.